Broadcom Limited has unveiled the silicon-proven 7nm intellectual property (IP) for an ASIC platform targeting deep learning and networking applications.
Based on TSMC 7nm process technology, the platform offers best-in-class IP cores which include high speed SerDes, HBM PHY, Die2Die PHY, mixed-signal IP, and foundation IP such as standard cells, SRAM, TCAM memory, and I/O cells.
7nm Technology Platform Highlights
•Broad SerDes portfolio including 112G PAM-4, 58G PAM-4, 32G and 16G Gen4 SerDes with best-in-class power, performance and die area in the industry
•JEDEC compliant HBM Gen2 and HBM Gen3 PHY provide a high bandwidth memory interface upgrade path for next generation deep learning, routing and high performance computing (HPC) ASICs
•Comprehensive portfolio of Arm® cores and peripherals
•Comprehensive single port, multi-port, register file and TCAM memory compilers along with optimized standard cell libraries for the most optimal solution
•Ultra low power Die2Die PHY enables multi-die integration, logic and I/O disaggregation
Benefits of 7nm ASIC Platform
•Ultra high density logic and memory enable unprecedented on-die computation for training and inference in deep learning applications and core density in HPC applications
•CoWoS® packaging combined with HBM2/3 PHY enables high bandwidth memory interface for next generation training in deep learning, HPC and routing applications
•High-bandwidth, low-footprint SerDes cores (112G and 56G SerDes) enable extremely high port density for switching and routing applications and high bandwidth inter-node connections in deep learning and HPC applications
•Broadcom’s broad 7nm IP portfolio enables SoC integration required to meet 5G needs for bandwidth, coverage and equipment form factors
“Broadcom’s 7nm ASIC platform provides SoC leadership for our customers enabling a leap-forward in innovation,” said Frank Ostojic, senior vice president and general manager of the ASIC Products Division at Broadcom. “Our 7nm platform, including 112G SerDes, HBM2/3 PHY and our proven design methodology, provides significant time-to-market advantage for our customers.”
“Broadcom and TSMC have driven unparalleled silicon innovation over the last decade. TSMC 7nm process technology and CoWoS technologies combined with Broadcom’s IP cores and ASIC design methodology continues to enable best-in-class custom solutions for the end customers,” said Dr. BJ Woo, vice president of business development at TSMC.
Advanced 7nm IP has been proven in silicon. Design kit for 7nm ASIC platform is available now. Several customer products are already in development. Lead 7nm customer ASIC products are scheduled to tape-out in calendar Q4 2017.